PIT_STOP_ACK=PIT_STOP_ACK_0, SAI3_STOP_ACK=SAI3_STOP_ACK_0, FLEXSPI_STOP_REQ=FLEXSPI_STOP_REQ_0, CAN2_STOP_REQ=CAN2_STOP_REQ_0, SAI2_STOP_ACK=SAI2_STOP_ACK_0, PIT_STOP_REQ=PIT_STOP_REQ_0, CAN1_STOP_REQ=CAN1_STOP_REQ_0, ENET_STOP_ACK=ENET_STOP_ACK_0, EDMA_STOP_REQ=EDMA_STOP_REQ_0, SAI1_STOP_REQ=SAI1_STOP_REQ_0, EDMA_STOP_ACK=EDMA_STOP_ACK_0, SEMC_STOP_ACK=SEMC_STOP_ACK_0, ENET_STOP_REQ=ENET_STOP_REQ_0, FLEXIO1_STOP_REQ=FLEXIO1_STOP_REQ_0, FLEXSPI_STOP_ACK=FLEXSPI_STOP_ACK_0, SAI1_STOP_ACK=SAI1_STOP_ACK_0, CAN1_STOP_ACK=CAN1_STOP_ACK_0, FLEXIO1_STOP_ACK=FLEXIO1_STOP_ACK_0, TRNG_STOP_ACK=TRNG_STOP_ACK_0, SAI2_STOP_REQ=SAI2_STOP_REQ_0, TRNG_STOP_REQ=TRNG_STOP_REQ_0, CAN2_STOP_ACK=CAN2_STOP_ACK_0, SAI3_STOP_REQ=SAI3_STOP_REQ_0, SEMC_STOP_REQ=SEMC_STOP_REQ_0
GPR4 General Purpose Register
| EDMA_STOP_REQ | EDMA stop request 0 (EDMA_STOP_REQ_0): stop request off 1 (EDMA_STOP_REQ_1): stop request on |
| CAN1_STOP_REQ | CAN1 stop request 0 (CAN1_STOP_REQ_0): stop request off 1 (CAN1_STOP_REQ_1): stop request on |
| CAN2_STOP_REQ | CAN2 stop request 0 (CAN2_STOP_REQ_0): stop request off 1 (CAN2_STOP_REQ_1): stop request on |
| TRNG_STOP_REQ | TRNG stop request 0 (TRNG_STOP_REQ_0): stop request off 1 (TRNG_STOP_REQ_1): stop request on |
| ENET_STOP_REQ | ENET stop request 0 (ENET_STOP_REQ_0): stop request off 1 (ENET_STOP_REQ_1): stop request on |
| SAI1_STOP_REQ | SAI1 stop request 0 (SAI1_STOP_REQ_0): stop request off 1 (SAI1_STOP_REQ_1): stop request on |
| SAI2_STOP_REQ | SAI2 stop request 0 (SAI2_STOP_REQ_0): stop request off 1 (SAI2_STOP_REQ_1): stop request on |
| SAI3_STOP_REQ | SAI3 stop request 0 (SAI3_STOP_REQ_0): stop request off 1 (SAI3_STOP_REQ_1): stop request on |
| SEMC_STOP_REQ | SEMC stop request 0 (SEMC_STOP_REQ_0): stop request off 1 (SEMC_STOP_REQ_1): stop request on |
| PIT_STOP_REQ | PIT stop request 0 (PIT_STOP_REQ_0): stop request off 1 (PIT_STOP_REQ_1): stop request on |
| FLEXSPI_STOP_REQ | FlexSPI stop request 0 (FLEXSPI_STOP_REQ_0): stop request off 1 (FLEXSPI_STOP_REQ_1): stop request on |
| FLEXIO1_STOP_REQ | FlexIO1 stop request 0 (FLEXIO1_STOP_REQ_0): stop request off 1 (FLEXIO1_STOP_REQ_1): stop request on |
| EDMA_STOP_ACK | EDMA stop acknowledge 0 (EDMA_STOP_ACK_0): EDMA stop acknowledge is not asserted 1 (EDMA_STOP_ACK_1): EDMA stop acknowledge is asserted (EDMA is in STOP mode) |
| CAN1_STOP_ACK | CAN1 stop acknowledge 0 (CAN1_STOP_ACK_0): CAN1 stop acknowledge is not asserted 1 (CAN1_STOP_ACK_1): CAN1 stop acknowledge is asserted |
| CAN2_STOP_ACK | CAN2 stop acknowledge 0 (CAN2_STOP_ACK_0): CAN2 stop acknowledge is not asserted 1 (CAN2_STOP_ACK_1): CAN2 stop acknowledge is asserted |
| TRNG_STOP_ACK | TRNG stop acknowledge 0 (TRNG_STOP_ACK_0): TRNG stop acknowledge is not asserted 1 (TRNG_STOP_ACK_1): TRNG stop acknowledge is asserted |
| ENET_STOP_ACK | ENET stop acknowledge 0 (ENET_STOP_ACK_0): ENET stop acknowledge is not asserted 1 (ENET_STOP_ACK_1): ENET stop acknowledge is asserted |
| SAI1_STOP_ACK | SAI1 stop acknowledge 0 (SAI1_STOP_ACK_0): SAI1 stop acknowledge is not asserted 1 (SAI1_STOP_ACK_1): SAI1 stop acknowledge is asserted |
| SAI2_STOP_ACK | SAI2 stop acknowledge 0 (SAI2_STOP_ACK_0): SAI2 stop acknowledge is not asserted 1 (SAI2_STOP_ACK_1): SAI2 stop acknowledge is asserted |
| SAI3_STOP_ACK | SAI3 stop acknowledge 0 (SAI3_STOP_ACK_0): SAI3 stop acknowledge is not asserted 1 (SAI3_STOP_ACK_1): SAI3 stop acknowledge is asserted |
| SEMC_STOP_ACK | SEMC stop acknowledge 0 (SEMC_STOP_ACK_0): SEMC stop acknowledge is not asserted 1 (SEMC_STOP_ACK_1): SEMC stop acknowledge is asserted |
| PIT_STOP_ACK | PIT stop acknowledge 0 (PIT_STOP_ACK_0): PIT stop acknowledge is not asserted 1 (PIT_STOP_ACK_1): PIT stop acknowledge is asserted |
| FLEXSPI_STOP_ACK | FLEXSPI stop acknowledge 0 (FLEXSPI_STOP_ACK_0): FLEXSPI stop acknowledge is not asserted 1 (FLEXSPI_STOP_ACK_1): FLEXSPI stop acknowledge is asserted |
| FLEXIO1_STOP_ACK | FLEXIO1 stop acknowledge 0 (FLEXIO1_STOP_ACK_0): FLEXIO1 stop acknowledge is not asserted 1 (FLEXIO1_STOP_ACK_1): FLEXIO1 stop acknowledge is asserted |